<?xml version="1.0" encoding='utf-8'?>
<!DOCTYPE wml PUBLIC "-//WAPFORUM//DTD WML 1.1//EN" "http://www.wapforum.org/DTD/wml_1.1.xml">
<wml>
<card id="card1" title="CDC Cyber - Page 11 - Wikipedia">
<p>
<a accesskey="1" href="page.php?w=CDC_Cyber&amp;p=10">1.Previous</a><br />
<a accesskey="3" href="page.php?w=CDC_Cyber&amp;p=12">3.Next</a>
</p>
<p>cache. Any loop that fit into the cache (which is usually called in-stack) runs very fast, without referencing main memory for instruction fetch.  The lower-end models do not contain an instruction stack.  However, since up to four instructions are packed into each 60-bit word, some degree of prefetching is inherent in the design.</p>

<p>As with predecessor systems, the Cyber 170 series has eight 18-bit address <a href="page.php?w=Processor_register">registers</a> (A0 through A7), eight 18-bit index registers (B0 through B7), and eight 60-bit</p><p>
<a accesskey="1" href="page.php?w=CDC_Cyber&amp;p=10">1.Previous</a><br />
<a accesskey="3" href="page.php?w=CDC_Cyber&amp;p=12">3.Next</a>
</p>

<do type="prev" label="Search">
        <go href="search.wml"/>
</do>

</card>
</wml>
