<?xml version="1.0" encoding='utf-8'?>
<!DOCTYPE wml PUBLIC "-//WAPFORUM//DTD WML 1.1//EN" "http://www.wapforum.org/DTD/wml_1.1.xml">
<wml>
<card id="card1" title="Instruction cycle - Page 12 - Wikipedia">
<p>
<a accesskey="1" href="page.php?w=instruction_cycle&amp;p=11">1.Previous</a><br />
<a accesskey="3" href="page.php?w=instruction_cycle&amp;p=13">3.Next</a>
</p>
<p>of the instruction in memory.<br/>
# The CU sends a signal to the <a href="page.php?w=control_bus">control bus</a> to read the memory at the address in MAR - the data read is placed in the <a href="page.php?w=Bus_%28computing%29">data bus</a>.<br/>
# The data is transferred to the CPU via the data bus, where it's loaded into the MDR - at this stage, the PC increments by one.<br/>
# The contents (instruction to-be-executed) of the MDR are copied into the CIR (where the instruction opcode and data operand can be decoded).</p>

<p><big>Decode stage</big></p>
<p>The</p><p>
<a accesskey="1" href="page.php?w=instruction_cycle&amp;p=11">1.Previous</a><br />
<a accesskey="3" href="page.php?w=instruction_cycle&amp;p=13">3.Next</a>
</p>

<do type="prev" label="Search">
        <go href="search.wml"/>
</do>

</card>
</wml>
