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<p>and <a href="page.php?w=IBM_AIX">IBM AIX</a> terminology) allows for "the best of both worlds", reducing the pressure on the <a href="page.php?w=translation_lookaside_buffer">TLB cache</a> (sometimes increasing speed by as much as 15%) for large allocations while still keeping memory usage at a reasonable level for small allocations.</p>

<p>Starting with the <a href="page.php?w=Pentium_Pro">Pentium Pro</a>, and the <a href="page.php?w=AMD_Athlon">AMD Athlon</a>, <a href="page.php?w=x86">x86</a> processors support 4&nbsp;MiB pages (called <a href="page.php?w=Page_Size_Extension">Page Size Extension</a>)</p><p>
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