has been shrinking with each new generation of memory chips, reducing the charge stored, refresh intervals for DRAM have been increasing; from 8 ms for 1M chips, 32 ms for 16M chips, to 64 ms for 256M chips. Longer refresh interval means a smaller fraction of the device's time is occupied with refresh, leaving more time for memory accesses. This improvement is achieved mainly by reduced leakage.

The actual persistence of readable charge values and thus data in most DRAM memory cells is much longer than the refresh interval,