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<p>delay to the clock signal to meet the setup and hold times on the sink. RGMII v2.0 specifies an optional internal delay, obviating the need for the PCB designer to add delay; this is known as RGMII-ID.</p>

<p>RGMII version 1.3 uses 2.5V CMOS, whereas RGMII version 2 uses 1.5V <a href="page.php?w=High-speed_transceiver_logic">HSTL</a>.</p>

<p><big>Serial gigabit media-independent interface</big></p>
<p>The serial gigabit media-independent interface (SGMII) is a variant of MII used for <a href="page.php?w=Gigabit_Ethernet">Gigabit Ethernet</a> but can</p><p>
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