<?xml version="1.0" encoding='utf-8'?>
<!DOCTYPE wml PUBLIC "-//WAPFORUM//DTD WML 1.1//EN" "http://www.wapforum.org/DTD/wml_1.1.xml">
<wml>
<card id="card1" title="Digital signal processor - Page 28 - Wikipedia">
<p>
<a accesskey="1" href="page.php?w=digital_signal_processor&amp;p=27">1.Previous</a><br />
<a accesskey="3" href="page.php?w=digital_signal_processor&amp;p=29">3.Next</a>
</p>
<p>produces the <a href="page.php?w=TMS320C6000">C6000</a> series DSPs, which have clock speeds of 1.2&nbsp;GHz and implement separate instruction and data caches. They also have an 8&nbsp;MiB 2nd level cache and 64 EDMA channels. The top models are capable of as many as 8000 MIPS (<a href="page.php?w=millions_of_instructions_per_second">millions of instructions per second</a>), use VLIW (<a href="page.php?w=very_long_instruction_word">very long instruction word</a>), perform eight operations per clock-cycle and are compatible with a broad range</p><p>
<a accesskey="1" href="page.php?w=digital_signal_processor&amp;p=27">1.Previous</a><br />
<a accesskey="3" href="page.php?w=digital_signal_processor&amp;p=29">3.Next</a>
</p>

<do type="prev" label="Search">
        <go href="search.wml"/>
</do>

</card>
</wml>
