1.Previous
3.Next

in the memory cell is driven into the bit line () and the inverted one into its complement (). Next transistors M5 and M6 are open by driving a logic 1 (voltage high) into the word line (). This effectively connects the bit lines to the by-stable inverter loop. There are two possible cases:
:# If the value of the loop is the same as the new value driven, there is no change;
:# if the value of the loop is different from the new value driven there are two conflicting values, in order for the voltage in the bit lines to overwrite the output

1.Previous
3.Next