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<p>of a halt that waits for an interrupt), data is transferred to the low-leakage cells, and the others are turned off.  When the CPU leaves a low-leakage mode (e.g. because of an interrupt), the process is reversed.</p>

<p>Older designs would copy the CPU state to memory, or even disk, sometimes with specialized software. Very simple embedded systems sometimes just restart.</p>

<p><big> Integrating with the computer </big></p>
<p>All modern CPUs have control logic to attach the CPU to the rest of the computer. In modern computers, this is usually a bus</p><p>
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