<?xml version="1.0" encoding='utf-8'?>
<!DOCTYPE wml PUBLIC "-//WAPFORUM//DTD WML 1.1//EN" "http://www.wapforum.org/DTD/wml_1.1.xml">
<wml>
<card id="card1" title="CDC 3000 series - Page 9 - Wikipedia">
<p>
<a accesskey="1" href="page.php?w=CDC_3000_series&amp;p=8">1.Previous</a><br />
<a accesskey="3" href="page.php?w=CDC_3000_series&amp;p=10">3.Next</a>
</p>
<p>affect the value).  There is no status (flags or condition code) register.  Up to 32,768 words of core memory, 24 bits per word, can be directly addressed, and multiple banks can be switched in.  Two or three memory bank configurations are the most common.</p>

<p>Each instruction contains six bits of opcode, one bit specifying whether indirect addressing used, two bits of index register address and fifteen bits of address.</p>

<p>Arithmetic uses <a href="page.php?w=ones%27_complement">ones' complement</a>, so there are two forms of zero: positive</p><p>
<a accesskey="1" href="page.php?w=CDC_3000_series&amp;p=8">1.Previous</a><br />
<a accesskey="3" href="page.php?w=CDC_3000_series&amp;p=10">3.Next</a>
</p>

<do type="prev" label="Search">
        <go href="search.wml"/>
</do>

</card>
</wml>
