<?xml version="1.0" encoding='utf-8'?>
<!DOCTYPE wml PUBLIC "-//WAPFORUM//DTD WML 1.1//EN" "http://www.wapforum.org/DTD/wml_1.1.xml">
<wml>
<card id="card1" title="Real mode - Page 9 - Wikipedia">
<p>
<a accesskey="1" href="page.php?w=Real_mode&amp;p=8">1.Previous</a><br />
<a accesskey="3" href="page.php?w=Real_mode&amp;p=10">3.Next</a>
</p>
<p>and <a href="page.php?w=80186">80186</a> have a 20-bit address bus, but the unusual segmented addressing scheme Intel chose for these processors actually produces effective addresses which can have 21 significant bits.  This scheme shifts a 16-bit segment number left four bits (making a 20-bit number with four least-significant zeros) before adding to it a 16-bit address offset; the maximum sum occurs when both the segment and offset are 0xFFFF, yielding 0xFFFF0 + 0xFFFF = 0x10FFEF. On the 8086, 8088, and 80186, the result of an effective address</p><p>
<a accesskey="1" href="page.php?w=Real_mode&amp;p=8">1.Previous</a><br />
<a accesskey="3" href="page.php?w=Real_mode&amp;p=10">3.Next</a>
</p>

<do type="prev" label="Search">
        <go href="search.wml"/>
</do>

</card>
</wml>
